This invention relates to the field of integrated circuits. More particularly, this invention relates to a method of suppressing noise (e.g. decoupling) from the voltage to ground distribution circuit in integrated circuit packages such as surface mounted leaded or leadless chip carriers, dual-in-line packages, Pin Grid Array and quad flat packages.
This application is related to U.S. Application Serial entitled MOLDED INTEGRATED CIRCUIT PACKAGE INCORPORATING THIN CAPACITOR AND U.S. Application Ser. No. 479,074 entitled INTEGRATED CIRCUIT PACKAGE HAVING AN INTERNAL CAVITY FOR INCORPORATING DECOUPLING CAPACITOR, both of which were invented by Jorge Hernandez and filed contemporaneously with this application.
It is well known in the field of microelectronics that high frequency operation, particularly the switching of integrated circuits, can result in transient energy being coupled into the power supply circuit. It is also well known that integrated circuits are becoming more dense (more gates per unit area of silicon/or gallium arsenide), more powerful (more watts per unit area of IC chip), and faster with higher clock rate frequencies and with smaller rise times. All of these continuing developments make the problem of suppressing noise in the power bus (produced by a large amount of simultaneous gates switching) even more serious than in the past.
Generally, the prevention of the coupling of undesired high frequency noise or interference into the power supply bus for an integrated circuit is accomplished by connecting a decoupling capacitor between the power and the ground leads of the IC. Conventional methods of decoupling (noise suppression) include the use of decoupling capacitors external tot he IC package, such as monolithic multilayer ceramic (MLC) chip capacitors. However, such MLC's suffer from several important drawbacks and problems. For example, each multilayer capacitor occupies printed wiring board "real estate" that could be utilized either by other active components or to make the board smaller. Both alternatives yield a higher density printed circuit board; and it will be appreciated that higher density printed circuit boards currently are one of the primary goals of printed circuit board designers. Still another drawback of ceramic MLC's are their susceptability for cracking and microcracking caused by a wide variety of sources. These cracks are extremely detrimental to the component reliability and usually result in catastrophic failure of the MLC.
In an effort to avoid the problem relating to taking up too much space on the printed circuit board, an external "noise suppression" connection scheme (which has been found to be quite successful), is to mount a decoupling capacitor underneath an integrated circuit. Such decoupling capacitors are commercially available from Rogers Corporation (assignee of the present application) and are sold under the trademark MICRO Q. Examples of these decoupling capacitors are found in U.S. Pat. Nos. 4,475,143, 4,502,101 and 4,748,537, all of which are assigned to the assignee hereof. These patents disclose decoupling capacitors which are particularly well suited for pin grid array and plastic leaded chip carrier packages.
Several of these prior patents disclose decoupling capacitors for use under an integrated circuit package wherein the decoupling capacitor incorporates a ceramic multilayer capacitor chip therein. Unfortunately, it is difficult to proactically utilize these decoupling capacitors in conjunction with many leaded surface mount and other packages due to the small space (e.g. about 0.015 to 0.020 inch) between the circuit board and the package. It is extremely difficult to manufacture a ceramic MLC having a thickness of this small magnitude. In addition, such a thin and small ceramic MLC will not exhibit the mechanical ruggedness required when using automated pick-and-place equipment and will therefore be prone to cracks and failure. While the single layer (as opposed to MLC) decoupling capacitors can easily be made to small thickness, these decoupling capacitors cannot achieve the high capacitance values obtainable by multilayer capacitor chips.